3 May 2012
There will be a Technical Lecture given by MIT Professor, Prof. Jakub Kedzierski.
The Lecture Title : A Decade of Nanoelectronics
The Lecture will be held on:
Date: 8 May 2012 (Tuesday)
Time: 10.30 am
Venue: Dewan Persidangan Pusat Pengurusan Penyelidikan dan Instrumentasi (CRIM)
All Acedemics are cordially invited
A Decade of Nanoelectronics – Journey from classical bulk CMOS to metal-gate FinFETs
Jakub Kedzierski
Abstract:
For decades Moore’s Law and traditional scaling of electronics have brought ever increasing gains in
performance, making the modern electronics age possible. Arguably the most important part of this scaling is the decreasing size of the transistor. However, approximately 10 years ago, the industry was faced with a dilemma that could have derailed Moore’s Law. Due to the quantum nature of the electron, the transistor could not be scaled geometrically as it had been, in decades past.
In order to keep electronics performance increasing, scientists and engineers had to resort to clever and innovative techniques in redesigning the traditional transistor. This has spurred a decade of innovation in the CMOS technology, gradually but surely transitioning the industry from classical microelectronics to modern nanoelectronics. In this talk, I will summarize the exciting evolution of the transistor in the last decade, covering innovations in strain engineering, metal gates, and alternative device structures, including an insider’s perspective on the development of the FinFET. The talk will also include a view of the road ahead, with a critical look at graphene and carbon nanotube technologies.
Speaker Bio:
Jakub Kedzierski received his Ph.D. in electrical engineering from the University of California at Berkeley in 2001, where he was one of the co-inventors of the FinFET device architecture. After graduation, Jakub worked at IBM's T.J. Watson Research Center working on FinFETs and metal-gate transistors. In 2005, he joined MIT Lincoln Laboratory where he is the Assistant Group Leader in the Advanced Silicon Devices Group. Currently he is on leave from MIT to serve as a visiting faculty at the Indian Institute of Technology Bombay. His research interests include: advanced silicon devices, low-power electronics, 3D integration, graphene, and microfluidics. Jakub has been awarded the IEEE EDS Paul Rappaport, and the IEEE EDS George Smith Award for best-papers, and has participated in IEDM's process committee, NSF review panel and contributed as a reviewer for the IEEE. He has over 60 publications and patents in the electronics area.
